Freescale Semiconductor MPC8313E Family Reference Manual page 31

Paragraph
Number
16.6.4 Suspend/Resume...................................................................................................... 16-71
16.6.4.1 Port Suspend/Resume .......................................................................................... 16-71
16.6.5 Schedule Traversal Rules......................................................................................... 16-73
16.6.6 Periodic Schedule Frame Boundaries vs. Bus Frame Boundaries........................... 16-74
16.6.7 Periodic Schedule .................................................................................................... 16-77
16.6.8 Managing Isochronous Transfers Using iTDs ......................................................... 16-78
16.6.8.1 Host Controller Operational Model for iTDs ...................................................... 16-79
16.6.8.2 Software Operational Model for iTDs ................................................................. 16-80
16.6.8.2.1
16.6.9 Asynchronous Schedule........................................................................................... 16-83
16.6.9.1 Adding Queue Heads to Asynchronous Schedule ............................................... 16-84
16.6.9.2 Removing Queue Heads from Asynchronous Schedule...................................... 16-84
16.6.9.3 Empty Asynchronous Schedule Detection .......................................................... 16-86
16.6.9.4 Asynchronous Schedule Traversal: Start Event................................................... 16-87
16.6.9.5 Reclamation Status Bit (USBSTS Register)........................................................ 16-87
16.6.10 Managing Control/Bulk/Interrupt Transfers via Queue Heads................................ 16-87
16.6.10.1 Buffer Pointer List Use for Data Streaming with qTDs ...................................... 16-88
16.6.10.2 Adding Interrupt Queue Heads to the Periodic Schedule.................................... 16-90
16.6.10.3 Managing Transfer Complete Interrupts from Queue Heads .............................. 16-90
16.6.11 Ping Control............................................................................................................. 16-91
16.6.12 Split Transactions..................................................................................................... 16-92
16.6.12.1 Split Transactions for Asynchronous Transfers................................................... 16-92
16.6.12.1.1
16.6.12.1.2
16.6.12.2 Split Transaction Interrupt ................................................................................... 16-94
16.6.12.2.1
16.6.12.2.2
16.6.12.2.3
16.6.12.2.4
16.6.12.2.5
16.6.12.2.6
16.6.12.2.7
16.6.12.2.8
16.6.12.2.9
16.6.12.3 Split Transaction Isochronous ........................................................................... 16-106
16.6.12.3.1
16.6.12.3.2
16.6.12.3.3
16.6.12.3.4
16.6.12.3.5
16.6.12.3.6
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Contents
Periodic Scheduling Threshold........................................................................ 16-82
Asynchronous-Do-Start-Split........................................................................ 16-93
Asynchronous-Do-Complete-Split ............................................................... 16-93
Split Transaction Scheduling Mechanisms for Interrupt ................................. 16-94
Host Controller Operational Model for FSTNs ............................................... 16-97
Software Operational Model for FSTNs ......................................................... 16-99
Tracking Split Transaction Progress for Interrupt Transfers ......................... 16-100
Split Transaction Execution State Machine for Interrupt .............................. 16-100
Periodic Interrupt-Do-Start-Split ................................................................ 16-101
Periodic Interrupt-Do-Complete-Split ........................................................ 16-102
Managing the QH[FrameTag] Field .............................................................. 16-105
Rebalancing the Periodic Schedule ............................................................... 16-106
Split Transaction Scheduling Mechanisms for Isochronous ......................... 16-107
Tracking Split Transaction Progress for Isochronous Transfers.....................16-111
Split Transaction Execution State Machine for Isochronous......................... 16-112
Periodic Isochronous-Do-Start-Split........................................................... 16-113
Periodic Isochronous-Do Complete Split ................................................... 16-115
Complete-Split for Scheduling Boundary Cases 2a, 2b ................................ 16-118
Title
Page
Number
xxxi