Freescale Semiconductor MPC8313E Family Reference Manual page 80

About This Book
Term
DDR Double data rate
DEU Data encryption standard execution unit
DMA Direct memory access
DRAM Dynamic random access memory
DTLB Data translation lookaside buffers
DUART Dual universal asynchronous receiver/transmitter
EA Effective address
ECC Error checking and correction
EHCI Enhanced host controller interface
EHPI Enhanced host port interface
EPROM Erasable programmable read-only memory
FS Full-speed
FCS Frame-check sequence
GMII Gigabit media independent interface
GPCM General-purpose chip-select machine
GPIO General-purpose I/O
GPR General-purpose register
GTM General purpose timers
IAD Internet access device
2
I C Inter-integrated circuit
IEEE Institute of Electrical and Electronics Engineers
IOS I/O sequencer
IPG Interpacket gap
ISDN Integrated services digital network
ITLB Instruction translation lookaside buffer
IU Integer unit
JTAG Joint Test Action Group
LALE LBC external address latch enable
LBC Local bus controller
LRU Least recently used
LSB Least-significant byte
lsb Least-significant bit
LSU Load/store unit
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
lxxx
Table i. Acronyms and Abbreviated Terms (continued)
Meaning
Freescale Semiconductor