Freescale Semiconductor MPC8313E Family Reference Manual page 137

Offset
0x3_6100– MDEU context memory registers
0x3_6120
0x3_6400– MDEU key memory
0x3_647F
0x3_6800– MDEU FIFO
0x3_6FFF
1
Depends on the reset configuration word high values. See
details.
2
Depends on the reset configuration word high values. See
Value", for details.
3
Depends on the reset configuration word high values. See
details.
4
Depends on the reset configuration word high values. See
Value", for details.
5
Depends on the reset configuration word high values. See
details.
6
Depends on the reset configuration word high values. See
Reset Value", for details.
7
Depends on the reset configuration word high values.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Table 2-2. Memory Map (continued)
Register
Section 5.2.4.3.1, "LBLAWBAR0[BASE_ADDR] Reset Value",
Section 5.2.4.4.1, "LBLAWAR0[EN] and LBLAWAR0[SIZE] Reset
Section 5.2.4.5.1, "PCILAWBAR0[BASE_ADDR] Reset
Section 5.2.4.6.1, "PCILAWAR0[EN] and PCILAWAR0[SIZE] Reset
Section 5.2.4.7.1, "DDRLAWBAR0[BASE_ADDR] Reset Value",
Section 5.2.4.8.1, "DDRLAWAR0[EN] and DDRLAWAR0[SIZE]
Access Reset
R/W 0x0000_0000
_0000_0000
W 0x0000_0000
_0000_0000
W 0x0000_0000
_0000_0000
Memory Map
Section/Page
14.4.2.11/14-38
14.4.2.12/14-39
14.4.2.13/14-40
for
Value", for
for
2-31