Freescale Semiconductor MPC8313E Family Reference Manual page 5

Paragraph
Number
4.3.2.2.5
4.3.2.2.6
4.3.2.2.7
4.3.2.2.8
4.3.3 Loading the Reset Configuration Words ................................................................... 4-21
4.3.3.1 Loading from Local Bus........................................................................................ 4-21
4.3.3.1.1
4.3.3.2 Loading from I2C EEPROM ................................................................................. 4-23
4.3.3.2.1
4.3.3.2.2
4.3.3.2.3
4.3.3.2.4
4.3.3.3 Default Reset Configuration Words....................................................................... 4-26
4.3.3.3.1
4.4 Clocking ........................................................................................................................ 4-28
4.4.1 Clocking in PCI Host Mode....................................................................................... 4-30
4.4.1.1 PCI Clock Outputs (PCI_CLK_OUT[0:2]) ........................................................... 4-30
4.4.2 Clocking In PCI Agent Mode .................................................................................... 4-30
4.4.3 System Clock Domains.............................................................................................. 4-30
4.4.4 USB Clocking ............................................................................................................ 4-31
4.4.5 Ethernet Clocking ...................................................................................................... 4-32
4.4.6 Real-Time Clock (RTC)............................................................................................. 4-32
4.5 Memory Map/Register Definitions ................................................................................ 4-32
4.5.1 Reset Configuration Register Descriptions................................................................ 4-32
4.5.1.1 Reset Configuration Word Low Register (RCWLR)............................................. 4-33
4.5.1.2 Reset Configuration Word High Register (RCWHR)............................................ 4-33
4.5.1.3 Reset Status Register (RSR) .................................................................................. 4-33
4.5.1.4 Reset Mode Register (RMR) ................................................................................. 4-34
4.5.1.5 Reset Protection Register (RPR) ........................................................................... 4-35
4.5.1.6 Reset Control Register (RCR) ............................................................................... 4-35
4.5.1.7 Reset Control Enable Register (RCER)................................................................. 4-36
4.5.2 Clock Configuration Registers................................................................................... 4-36
4.5.2.1 System PLL Mode Register (SPMR) .................................................................... 4-37
4.5.2.2 Output Clock Control Register (OCCR)................................................................ 4-38
4.5.2.3 System Clock Control Register (SCCR)................................................................ 4-39
5.1 Introduction...................................................................................................................... 5-1
5.2 Local Memory Map Overview and Example .................................................................. 5-1
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Contents
eTSEC1 Mode ................................................................................................... 4-19
eTSEC2 Mode ................................................................................................... 4-20
e300 Core True Little-Endian............................................................................ 4-21
LALE Configuration.......................................................................................... 4-21
Local Bus Controller Setting ............................................................................. 4-22
Using the Boot Sequencer Reset Configuration ................................................ 4-23
EEPROM Calling Address ................................................................................ 4-23
EEPROM Data Format in Reset Configuration Mode ...................................... 4-24
Reset Configuration Load Fail .......................................................................... 4-26
Examples for Hard-Coded Reset Configuration Words Usage ......................... 4-27
System Configuration
Title
Chapter 5
Page
Number
v