About This Book - Freescale Semiconductor MPC8313E Family Reference Manual

About This Book

This reference manual defines the functionality of the MPC8313E. It is written from the perspective of the
MPC8313E, which is the superset device, and unless otherwise noted, the information applies also to the
MPC8313. Note that the MPC8313 does not support a security engine.
The MPC8313E is a low-power, highly integrated host processor that addresses the requirements of
several printing and imaging, consumer, and industrial applications, including main CPUs and I/O
processors in printing systems, networking switches and line cards, wireless LANs (WLANs), network
access servers (NAS), VPN routers, intelligent NIC, and industrial controllers. The MPC8313E extends
the PowerQUICC family, adding higher CPU performance, additional functionality, and faster interfaces
while addressing the requirements related to time-to-market, price, power consumption, and package size.
The MPC8313E contains an embedded PowerPC e300c3 core built on Power Architecture® technology.
Audience
It is assumed that the reader understands operating systems, microprocessor system design, and the basic
principles of RISC processing.
Organization
Following is a summary and a brief description of the major parts of this reference manual:
• Chapter 1, "Overview,"
MPC8313E integrated host processor. It describes the MPC8313E, its interfaces, and the
programming model. The functional operation of the MPC8313E, with emphasis on peripheral
functions, is also described.
• Chapter 2, "Memory Map,"
local address map is provided. Next, a complete listing of all memory-mapped registers is
provided, with cross references to the sections detailing descriptions of each.
• Chapter 3, "Signal Descriptions,"
signals that serve multiple functions, their functional blocks, and I/O states. Also, these signals are
listed by alphabetical order.
• Chapter 4, "Reset, Clocking, and Initialization,"
reset (POR) sequence, power-on reset configuration, clocking, and initialization of the
MPC8313E.
• Chapter 5, "System Configuration,"
local access windows, system configuration, software watchdog, real time clock, periodic and
general purpose timers, power management, protection, and general utilities.
• Chapter 6, "Arbiter and Bus Monitor,"
device. Also, it describes the configuration, control, and status registers of the arbiter.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
provides a high-level description of features and functionality of the
describes the memory map of the MPC8313E. An overview of the
provides a listing of all the external signals, cross-references for
provides an overview of several functions that control the
provides an overview of the arbiter in the MPC8313E
describes the hard and soft resets, the power-on
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