Freescale Semiconductor MPC8313E Family Reference Manual page 48

Figure
Number
14-27 AESU Key Size Register (AESUKSR) .............................................................................. 14-43
14-28 AESU Data Size Register (AESUDSR).............................................................................. 14-43
14-29 AESU Reset Control Register (AESURCR)....................................................................... 14-43
14-30 AESU Status Register (AESUSR) ...................................................................................... 14-44
14-31 AESU Interrupt Status Register (AESUISR)...................................................................... 14-45
14-32 AESU Interrupt Control Register (AESUICR) ................................................................... 14-47
14-33 AESU End-of-Message Register (AESUEMR).................................................................. 14-49
14-34 AESU Context Registers..................................................................................................... 14-49
14-35 AESU CCM Context Registers........................................................................................... 14-51
14-36 Crypto-Channel Configuration Register (CCCR)............................................................... 14-55
14-37 Crypto-Channel Pointer Status Register (CCPSR) ............................................................. 14-57
14-38 Crypto-Channel Current Descriptor Pointer Register (CDPR)........................................... 14-62
14-39 Fetch FIFO Register (FF).................................................................................................... 14-63
14-40 Descriptor Buffer (DB) ....................................................................................................... 14-63
14-41 EU Assignment Status Register (EUASR) ......................................................................... 14-68
14-42 Interrupt Mask Register (IMR) ........................................................................................... 14-69
14-43 Interrupt Status Register (ISR)............................................................................................ 14-71
14-44 Interrupt Clear Register (ICR) ............................................................................................ 14-72
14-45 ID Register (ID) .................................................................................................................. 14-73
14-46 IP Block Revision Register ................................................................................................. 14-73
14-47 Master Control Register (MCR) ......................................................................................... 14-74
15-1 eTSEC Block Diagram.......................................................................................................... 15-2
15-2 TSEC_ID Register .............................................................................................................. 15-22
15-3 TSEC_ID2 Register ............................................................................................................ 15-23
15-4 IEVENT Register Definition .............................................................................................. 15-25
15-5 IMASK Register Definition ................................................................................................ 15-28
15-6 EDIS Register Definition .................................................................................................... 15-30
15-7 ECNTRL Register Definition ............................................................................................. 15-31
15-8 PTV Register Definition...................................................................................................... 15-34
15-9 DMACTRL Register........................................................................................................... 15-34
15-10 TBIPA Register Definition.................................................................................................. 15-36
15-11 TCTRL Register Definition ................................................................................................ 15-36
15-12 TSTAT Register Definition ................................................................................................. 15-38
15-13 DFVLAN Register Definition............................................................................................. 15-42
15-14 TXIC Register Definition.................................................................................................... 15-43
15-15 TQUEUE Register Definition ............................................................................................. 15-44
15-16 TR03WT Register Definition.............................................................................................. 15-45
15-17 TR47WT Register Definition.............................................................................................. 15-45
15-18 TBDBPH Register Definition ............................................................................................. 15-46
15-19 TBPTR0–TBPTR7 Register Definition .............................................................................. 15-47
15-20 TBASE Register Definition ................................................................................................ 15-47
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
xlviii
Figures
Title
Page
Number
Freescale Semiconductor