Memory Map - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor

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Memory Map

0x2_5000–0x2_5FFF

0x2_6000–0x2_7FFF

0x2_8000–0x2_BFFF

0x2_C000–0x2_DFFF

0x2_E000–0x2_FFFF

0x3_0000–0x3_FFFF

0x4_0000–0x7_FFFF

0x8_0000–0xB_FFFF

0xC_0000–0xD_FFFF

0xE_0000–0xE_1FFF

0xE_2000–0xE_2FFF

0xE_3000–0xE_30FF

0xE_3100–0xE_31FF

0xE_3200–0xE_33FF

0xE_3400–0xE_37FF

0xE_3800–0xE_3FFF

0xE_4000–0xE_7FFF

0xE_8000–0xE_FFFF

0xF_0000–0xF_FFFF

lists the memory-mapped registers.

IMMRBAR—Internal memory map base address register

Reserved, should be cleared

ALTCBAR—Alternate configuration base address register

Reserved, should be cleared

LBLAWBAR0—LBC local access window 0 base address

LBLAWAR0—LBC local access window 0 attribute register

LBLAWBAR1—LBC local access window 1 base address

LBLAWAR1—LBC local access window 1 attribute register

MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3

Table 2-1. IMMR Memory Map (continued)

Security engine

Table 2-2. Memory Map

System Configuration Registers

3 Kbytes + 1K reserved

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