Freescale Semiconductor MPC8313E Family Reference Manual page 59

Table
Number
5-35 SWSRR Bit Settings ............................................................................................................. 5-32
5-36 RTC Signal Properties........................................................................................................... 5-37
5-37 RTC External Signal—Detailed Signal Descriptions ........................................................... 5-37
5-38 RTC Register Address Map .................................................................................................. 5-37
5-39 RTCNR Bit Settings.............................................................................................................. 5-38
5-40 RTLDR Bit Settings .............................................................................................................. 5-39
5-41 RTPSR Bit Settings ............................................................................................................... 5-39
5-42 RTCTR Bit Settings .............................................................................................................. 5-40
5-43 RTEVR Bit Settings .............................................................................................................. 5-40
5-44 RTALR Bit Settings .............................................................................................................. 5-41
5-45 PIT Signal Properties ............................................................................................................ 5-44
5-46 PIT External Signal—Detailed Signal Descriptions ............................................................. 5-44
5-47 PIT Register Address Map.................................................................................................... 5-44
5-48 PTCNR Bit Settings .............................................................................................................. 5-45
5-49 PTLDR Bit Settings .............................................................................................................. 5-46
5-50 PTPSR Bit Settings ............................................................................................................... 5-46
5-51 PTCTR Bit Settings............................................................................................................... 5-46
5-52 PTEVR Bit Settings .............................................................................................................. 5-47
5-53 GTM Signal Properties.......................................................................................................... 5-51
5-54 GTM External Signals—Detailed Signal Descriptions......................................................... 5-52
5-55 GTM Register Address Map ................................................................................................. 5-53
5-56 GTCFR1 Bit Settings ............................................................................................................ 5-55
5-57 GTCFR2 Bit Settings ............................................................................................................ 5-56
5-58 GTMDR Bit Settings............................................................................................................. 5-58
5-59 GTRFR Bit Settings .............................................................................................................. 5-59
5-60 GTCPRn Bit Settings ............................................................................................................ 5-59
5-61 GTCNR Bit Settings.............................................................................................................. 5-60
5-62 GTEVRn Bit Settings ............................................................................................................ 5-61
5-63 GTPSRn Bit Settings............................................................................................................. 5-61
5-64 System Control Signals—Detailed Signal Descriptions ....................................................... 5-66
5-65 Power Management Controller Registers Memory Map ...................................................... 5-66
5-66 PMCCR Bit Settings ............................................................................................................. 5-67
5-67 PMCER Bit Settings ............................................................................................................. 5-68
5-68 PMCMR Bit Settings ............................................................................................................ 5-70
5-69 PMCCR1 Bit Settings ........................................................................................................... 5-71
5-70 PMCCR2 Bit Settings ........................................................................................................... 5-73
5-71 PCI Defined Power Management State Support ................................................................... 5-75
5-72 PCI Bus Power Management State Support.......................................................................... 5-76
5-73 Software-Controller Power-Down States—Basic Description ............................................. 5-77
5-74 MPC8313E Agent Mode Wake-Up Support......................................................................... 5-81
5-75 MPC8313E Host Mode Wake-Up Support ........................................................................... 5-83
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
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