Clearing Of Status Flags - Renesas F-ZTAT H8 Series Hardware Manual

Timing of Setting of Overflow Flag (OVF): OVF is set to 1 when TCNT overflows from
H'FFFF to H'0000 or underflows from H'0000 to H'FFFF. Figure 10.59 shows the timing.
φ
TCNT
Overflow
signal
OVF
OVI
10.5.2

Clearing of Status Flags

If the CPU reads a status flag while it is set to 1, then writes 0 in the status flag, the status flag is
cleared. Figure 10.60 shows the timing.
φ
Address
IMF, OVF
H'FFFF
Figure 10.59 Timing of Setting of OVF
Figure 10.60 Timing of Clearing of Status Flags
Section 10 16-Bit Integrated Timer Unit (ITU)
H'0000
TSR write cycle
T T
1 2
TSR address
Rev. 7.00 Sep 21, 2005 page 393 of 878
T
3
REJ09B0259-0700