Trap Instruction; Stack Status After Exception Handling - Renesas H8S Series Hardware Manual

4.5

Trap Instruction

Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction exception handling can
be executed at all times in the program execution state.
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector number from 0 to 3, as
specified in the instruction code.
Table 4-5 shows the status of CCR and EXR after execution of trap instruction exception handling.
Table 4-5 Status of CCR and EXR after Trap Instruction Exception Handling
Interrupt Control Mode
0
2
Legend:
1: Set to 1
0: Cleared to 0
—: Retains value prior to execution.
4.6

Stack Status after Exception Handling

Figure 4-4 shows the stack after completion of trap instruction exception handling and interrupt exception handling.
SP
Rev.6.00 Oct.28.2004 page 78 of 1016
REJ09B0138-0600H
I
1
1
CCR
PC
(24 bits)
(a) Interrupt control mode 0
Note: * Ignored on return.
Figure 4-4 Stack Status after Exception Handling (Advanced Modes)
CCR
UI I2 to I0
— —
— —
SP
(b) Interrupt control mode 2
EXR
T
—
0
EXR
Reserved*
CCR
PC
(24 bits)