Trap Instruction - Renesas Hitachi H8S/2194 Series Hardware Manual

5.4

Trap Instruction

Trap instruction exception handling starts when a TRAPA instruction is executed. Trap
instruction exception handling can be executed at all times in the program execution state.
The TRAPA instruction fetches a start address from a vector table entry corresponding to a
vector number from 0 to 3, as specified in the instruction code.
Table 5.3 shows the status of CCR and EXR after execution of trap instruction exception
handling.
Table 5.3 Status of CCR and EXR after Trap Instruction Exception Handling
CCR
Interrupt
Control Mode I
0 1
1 1
Legend:
1: Set to 1
0: Cleared to 0
:
Retains value prior to execution.
Does not affect operation in this LSI.
*:
EXR*
UI I2 to I0
 

1
T


Rev. 2.0, 11/00, page 93 of 1037