Adc Analog Supply And Reference Connections; Alternate Clock - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Table 23-2. ADC0 channel assignment (continued)

(SC1n[ADCH])

1. ADCx_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b. Refer to MUXSEL description in ADC chapter

for details.

2. This is the PMC bandgap 1V reference voltage. Prior to reading from this ADC channel, ensure that you enable the

bandgap buffer by setting the PMC_REGSC[BGBE] bit. Refer to the device data sheet for the bandgap voltage (V

specification.

23.1.4 ADC analog supply and reference connections

This device includes dedicated VDDA and VSSA pins.

This device contains dedicated VREFH and VREFL pins on 64-pin and 48-pin packages.

Both VREFH and VREFL pads are internally connected to VDDA and VSSA

respectively on 36-pin and lower devices.

The output of On-chip 1.2V high precision voltage reference VREF_OUT shares with

VREFH on 64-pin and 48-pin packages. When VREF_OUT is enabled, this pin needs to

connect a capacitor to ground.

For this device, the alternate clock is connected to the external reference clock

This clock option is only usable when OSCERCLK is in the

MHz range. A system with OSCERCLK in the kHz range has

Freescale Semiconductor, Inc.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Chapter 23 Analog-to-Digital Converter (ADC)

Input signal (SC1n[DIFF]=

Temperature Sensor (Diff)

Bandgap (Diff)

VREFH (Diff)

Module Disabled

Input signal (SC1n[DIFF]=

12-bit DAC0 Output/

Temperature Sensor (S.E)

Bandgap (S.E)

Module Disabled