Serial Control Register (Scr) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Bit
Bit Name
1
CKS1
0
CKS0
Note:
etu (Elementary Time Unit): 1-bit transfer time
12.3.6

Serial Control Register (SCR)

SCR is a register that enables/disables the following SCI transfer operations and interrupt requests,
and selects the transfer clock source. For details on interrupt requests, see section 12.8, Interrupt
Sources. Some bits in SCR have different functions in normal mode and smart card interface
mode.
• When SMIF in SCMR = 0
Bit
Bit Name
Initial Value
R/W
• When SMIF in SCMR = 1
Bit
Bit Name
Initial Value
R/W
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Initial
Value
R/W
0
R/W
0
R/W
7
6
TIE
RIE
0
0
R/W
R/W
R/W
7
6
TIE
RIE
0
0
R/W
R/W
R/W
Section 12 Serial Communication Interface (SCI)
Description
Clock Select 1,0
These bits select the clock source for the baud rate
generator.
00: Pφ clock (n = 0)
01: Pφ/4 clock (n = 1)
10: Pφ/16 clock (n = 2)
11: Pφ/64 clock (n = 3)
For the relation between the settings of these bits and the
baud rate, see section 12.3.9, Bit Rate Register (BRR). n
is the decimal display of the value of n in BRR (see
section 12.3.9, Bit Rate Register (BRR)).
5
4
TE
RE
MPIE
0
0
R/W
R/W
5
4
TE
RE
MPIE
0
0
R/W
R/W
3
2
1
TEIE
CKE1
0
0
0
R/W
R/W
3
2
1
TEIE
CKE1
0
0
0
R/W
R/W
Rev. 3.00 Mar. 14, 2006 Page 385 of 804
0
CKE0
0
R/W
0
CKE0
0
R/W
REJ09B0104-0300

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