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• Time constant register BY_1 (TCORBY_1)
• Timer control register Y_1 (TCRY_1)
• Timer control/status register Y_1 (TCSRY_1)
• Timer input select register_1 (TISR_1)
TMRX_1:
• Timer counter X_1 (TCNTX_1)
• Time constant register AX_1 (TCORAX_1)
• Time constant register BX_1 (TCORBX_1)
• Timer control register X_1 (TCRX_1)
• Timer control/status register X_1 (TCSRX_1)
• Input capture register_1 (TICR_1)
• Time constant register_1 (TCORC_1)
• Input capture register R_1 (TICRR_1)
• Input capture register F_1 (TICRF_1)
11.3.1
Timer Counter (TCNT)
TCNT is an 8-bit readable/writable up-counter. TCNT0 and TCNT1 (or TCNTY and TCNTX)
comprise a single 16-bit register, so they can be accessed together in word units. The clock source
is selected by the CKS2 to CKS0 bits in TCR. TCNT can be cleared by an external reset input
signal, compare-match A signal, or compare-match B signal. The method of clearing can be
selected by the CCLR1 and CCLR0 bits in TCR. When TCNT overflows (changes from H'FF to
H'00), the OVF bit in TCSR is set to 1. TCNT is initialized to H'00.
11.3.2
Time Constant Register A (TCORA)
TCORA is an 8-bit readable/writable register. TCORA0 and TCORA1 (or TCORAY and
TCORAX) comprise a single 16-bit register, so they can be accessed together in word units.
TCORA is continually compared with the value in TCNT. When a match is detected, the CMFA
flag in TCSR is set to 1. Note however that comparison is disabled during the T2 state of a
TCORA write cycle. The timer output from the TMO pin can be freely controlled by this
compare-match A signal and the settings of the OS1 and OS0 bits in TCSR. TCORA is initialized
to H'FF.
11.3.3
Time Constant Register B (TCORB)
TCORB is an 8-bit readable/writable register. TCORB0 and TCORB1 (or TCORBY and
TCORBX) comprise a single 16-bit register, so they can be accessed together in word units.
TCORB is continually compared with the value in TCNT. When a match is detected, the CMFB
Rev. 1.00, 09/03, page 273 of 704
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