Low Power Timer Compare Register (Lptmrx_Cmr); Low Power Timer Counter Register (Lptmrx_Cnr) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Prescaler/glitch filter clock 0 selected.

Prescaler/glitch filter clock 1 selected.

Prescaler/glitch filter clock 2 selected.

Prescaler/glitch filter clock 3 selected.

31.4.3 Low Power Timer Compare Register (LPTMRx_CMR)

Address: 4004_0000h base + 8h offset = 4004_0008h

This field is reserved.

This read-only field is reserved and always has the value 0.

Compare Value

When the LPTMR is enabled and the CNR equals the value in the CMR and increments, TCF is set and

the hardware trigger asserts until the next time the CNR increments. If the CMR is 0, the hardware trigger

will remain asserted until the LPTMR is disabled. If the LPTMR is enabled, the CMR must be altered only

when TCF is set.

LPTMR counter

Address: 4004_0000h base + Ch offset = 4004_000Ch

This field is reserved.

This read-only field is reserved and always has the value 0.

Freescale Semiconductor, Inc.

LPTMRx_PSR field descriptions (continued)

LPTMRx_CMR field descriptions

for details on how to read counter value.

LPTMRx_CNR field descriptions

Table continues on the next page...

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Chapter 31 Low-Power Timer (LPTMR)