I2C Range Address Register (I2C_Ra) - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

Memory map/register definition

Stop holdoff is disabled. The MCU's entry to stop mode is not gated.

Stop holdoff is enabled.

I2C Bus Stop Detect Flag

Hardware sets this bit when the I2C bus's stop status is detected. The STOPF bit must be cleared by

writing 1 to it.

No stop happens on I2C bus

Stop detected on I2C bus

I2C Bus Stop or Start Interrupt Enable

This bit enables the interrupt for I2C bus stop or start detection.

NOTE: To clear the I2C bus stop or start detection interrupt: In the interrupt service routine, first clear the

STOPF or STARTF bit by writing 1 to it, and then clear the IICIF bit in the status register. If this

sequence is reversed, the IICIF bit is asserted again.

Stop or start detection interrupt is disabled

Stop or start detection interrupt is enabled

I2C Bus Start Detect Flag

Hardware sets this bit when the I2C bus's start status is detected. The STARTF bit must be cleared by

writing 1 to it.

No start happens on I2C bus

Start detected on I2C bus

I2C Programmable Filter Factor

Controls the width of the glitch, in terms of I2C module clock cycles, that the filter must absorb. For any

glitch whose size is less than or equal to this width setting, the filter does not allow the glitch to pass.

No filter/bypass

Filter glitches up to width of n I2C module clock cycles, where n=1-15d

45.4.8 I2C Range Address register (I2C_RA)

Address: 4006_6000h base + 7h offset = 4006_6007h

Range Slave Address

I2C_FLT field descriptions (continued)

I2C_RA field descriptions

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KV4x Reference Manual, Rev. 2, 02/2015

Freescale Semiconductor, Inc.