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Section 25 Flash Memory
25.4.5
Procedure Program and Storable Area for Programming Data
In the descriptions in the previous section, the programming/erasing procedure programs and
storable areas for program data are assumed to be in the on-chip RAM. However, the program and
the data can be stored in and executed from other areas, such as part of flash memory which is not
to be programmed or erased, or somewhere in the external address space.
(1)
Conditions that Apply to Programming/Erasing
1. The on-chip programming/erasing program is downloaded from the address in the on-chip
RAM specified by FTDAR, therefore, this area is not available for use.
2. The on-chip programming/erasing program will use 128 bytes at the maximum as a stack. So,
make sure that this area is secured.
3. Download by setting the SCO bit to 1 will lead to switching of the MAT. If, therefore, this
operation is used, it should be executed from the on-chip RAM.
4. The flash memory is accessible until the start of programming or erasing, that is, until the
result of downloading has been determined. When in a mode in which the external address
space is not accessible, such as single-chip mode, the required procedure programs, NMI
handling vector and NMI handler should be transferred to the on-chip RAM before
programming/erasing of the flash memory starts.
5. The flash memory is not accessible during programming/erasing operations, therefore, the
operation program is downloaded to the on-chip RAM to be executed. The NMI-handling
vector and programs such as that which activate the operation program, and NMI handler
should thus be stored in on-chip memory other than flash memory or the external address
space.
6. After programming/erasing, the flash memory should be inhibited until FKEY is cleared.
The reset state (RES = 0) must be in place for more than 100 µs when the LSI mode is changed
to reset on completion of a programming/erasing operation.
Transitions to the reset state, and hardware standby mode are inhibited during
programming/erasing. When the reset signal is accidentally input to the chip, a longer period in
the reset state than usual (100 µs) is needed before the reset signal is released.
7. Switching of the MATs by FMATS should be needed when programming/erasing of the user
boot MAT is operated in user-boot mode. The program which switches the MATs should be
executed from the on-chip RAM. See section 25.6, Switching between User MAT and User
Boot MAT. Please make sure you know which MAT is selected when switching between
them.
8. When the data storable area indicated by programming parameter FMPDR is within the flash
memory area, an error will occur even when the data stored is normal. Therefore, the data
Rev. 1.00 Mar. 12, 2008 Page 972 of 1178
REJ09B0403-0100
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