Mode Setting With Cascaded Connection - Renesas H8S/2158 User Manual

Section 13 8-Bit Timer (TMR)
Timing of Switchover
by Means of CKS1
No. and CKS0 Bits
4 Clock switching from
high to high level
Notes: 1. Includes switching from low to stop, and from stop to low.
2. Includes switching from stop to high.
3. Includes switching from high to stop.
4. Generated on the assumption that the switchover is a falling edge; TCNT is
incremented.
13.9.6

Mode Setting with Cascaded Connection

If the 16-bit count mode and compare-match count mode are set simultaneously, the input clock
pulses for TCNT_0 and TCNT_1 are not generated, and thus the counters will stop operating.
Simultaneous setting of these two modes should therefore be avoided.
Rev. 3.00 Jan 25, 2006 page 344 of 872
REJ09B0286-0300
TCNT Clock Operation
Clock before
switchover
Clock after
switchover
TCNT
clock
TCNT N N + 1 N + 2
CKS bit rewrite