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Section 18 Power-Down States
18.7.2
Clearing Software Standby Mode
Software standby mode is cleared by an external interrupt (NMI pin, or pins IRQ0 to IRQ11*), or
by means of the RES pin or STBY pin.
1. Clearing by interrupt
When an NMI or IRQ0 to IRQ11* interrupt request signal is input, clock oscillation starts, and
after the elapse of the time set in bits STS4 to STS0 in SBYCR, stable clocks are supplied to
the entire LSI, software standby mode is cleared, and interrupt exception handling is started.
When clearing software standby mode with an IRQ0 to IRQ11* interrupt, set the
corresponding enable bit to 1 and ensure that no interrupt with a higher priority than interrupts
IRQ0 to IRQ11* is generated. Software standby mode cannot be cleared if the interrupt has
been masked on the CPU side or has been designated as a DTC activation source.
Note: * By setting the SSIn bit in SSIER to 1, IRQ0 to IRQ11 can be used as a software
standby mode clearing source.
2. Clearing by RES pin
When the RES pin is driven low, clock oscillation is started. At the same time as clock
oscillation starts, clocks are supplied to the entire LSI. Note that the RES pin must be held low
until clock oscillation settles. When the RES pin goes high, the CPU begins reset exception
handling.
3. Clearing by STBY pin
When the STBY pin is driven low, a transition is made to hardware standby mode.
18.7.3
Setting Oscillation Settling Time after Clearing Software Standby Mode
Bits STS4 to STS0 in SBYCR should be set as described below.
1. Using a crystal resonator
Set bits STS4 to STS0 so that the standby time is at least equal to the oscillation settling time.
Table 18.2 shows the standby times for operating frequencies and settings of bits STS4 to
STS0.
2. Using an external clock
A PLL circuit settling time is necessary. Refer to table 18.2 to set the standby time.
Rev.2.00 Jun. 28, 2007 Page 576 of 666
REJ09B0311-0200
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