Contention Between Tcnt Write And Increment - Renesas H8S/2319 series Hardware Manual

10.6.2

Contention between TCNT Write and Increment

If a timer counter clock pulse is generated during the T
takes priority and the counter is not incremented.
Figure 10-11 shows this operation.
φ
Address
Internal write signal
TCNT input clock
TCNT
Figure 10-11 Contention between TCNT Write and Increment
state of a TCNT write cycle, the write
2
TCNT write cycle by CPU
T T
1
TCNT address
N
2
M
Counter write data
Rev. 5.00, 12/03, page 401 of 1088