Altera cyclone V Technical Reference page 2048

Hard processor system
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cv_5v4
2016.10.28
Bit
15:0
addrhi
MAC_Address127_Low
The MAC Address127 Low register holds the lower 32 bits of the 128th 6-byte MAC address of the station.
Note that all MAC Address Low registers (except MAC Address0 Low) have the same format.
Module Instance
emac0
emac1
Offset:
0xB7C
Access:
RW
31
30
15
14
MAC_Address127_Low Fields
Bit
31:0
addrlo
DMA Register Group Register Descriptions
DMA Register Group
Offset:
0x1000
Bus_Mode
The Bus Mode register establishes the bus operating modes for the DMA.
Ethernet Media Access Controller
Send Feedback
Name
This field contains the upper 16 bits (47:32) of the
128th 6-byte MAC address.
0xFF700000
0xFF702000
29
28
27
26
13
12
11
10
Name
This field contains the lower 32 bits of the 128th 6-
byte MAC address. The content of this field is
undefined until loaded by software after the initializa‐
tion process.
on page 17-835
Description
Base Address
Bit Fields
25
24
23
22
addrlo
RW 0xFFFFFFFF
9
8
7
6
addrlo
RW 0xFFFFFFFF
Description
MAC_Address127_Low
Access
Register Address
0xFF700B7C
0xFF702B7C
21
20
19
18
5
4
3
2
Access
17-833
Reset
RW
0xFFFF
17
16
1
0
Reset
RW
0xFFFFF
FFF
Altera Corporation

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