Altera cyclone V Technical Reference page 2075

Hard processor system

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Missed_Frame_And_Buffer_Overflow_Counter

buffer overflow conditions (MTL and MAC) and runt frames (good frames of less than 64 bytes) dropped

Module Instance

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by

Missed_Frame_And_Buffer_Overflow_Counter Fields

Altera Corporation

software or hardware. Any area of the memory map that is not explicitly defined as a register

space or accessible memory is considered reserved.

Overflow bit for FIFO Overflow Counter

This field indicates the number of frames missed by

the application. This counter is incremented each

time the MTL asserts the sideband signal mtl_

rxoverflow_o. The counter is cleared when this

Overflow bit for Missed Frame Counter

This field indicates the number of frames missed by

the controller because of the Host Receive Buffer

being unavailable. This counter is incremented each

time the DMA discards an incoming frame. The

counter is cleared when this register is read with mci_

be_i[0] at 1'b1.

Base Address

Ethernet Media Access Controller

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