Altera cyclone V Technical Reference page 2066

Hard processor system
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cv_5v4
2016.10.28
Bit
16:14
ttc
Ethernet Media Access Controller
Send Feedback
Name
These bits control the threshold level of the MTL
Transmit FIFO. Transmission starts when the frame
size within the MTL Transmit FIFO is larger than the
threshold. In addition, full frames with a length less
than the threshold are also transmitted. These bits are
used only when Bit 21 (TSF) is reset.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Description
Description
MTL Transmit FIFO Threshold 64
MTL Transmit FIFO Threshold 128
MTL Transmit FIFO Threshold 192
MTL Transmit FIFO Threshold 256
MTL Transmit FIFO Threshold 40
MTL Transmit FIFO Threshold 32
MTL Transmit FIFO Threshold 24
MTL Transmit FIFO Threshold 16
17-851
Operation_Mode
Access
Reset
RW
0x0
Altera Corporation

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