Altera cyclone V Technical Reference page 2082

Hard processor system
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cv_5v4
2016.10.28
Offset:
0x1050
Access:
RO
31
30
15
14
Current_Host_Transmit_Buffer_Address Fields
Bit
31:0
curtbufaptr
Current_Host_Receive_Buffer_Address
The Current Host Receive Buffer Address register points to the current Receive Buffer address being read
by the DMA.
Module Instance
emac0
emac1
Offset:
0x1054
Access:
RO
31
30
15
14
Ethernet Media Access Controller
Send Feedback
29
28
27
26
13
12
11
10
Name
Cleared on Reset. Pointer updated by the DMA
during operation.
0xFF700000
0xFF702000
29
28
27
26
13
12
11
10
Current_Host_Receive_Buffer_Address
Bit Fields
25
24
23
22
curtbufaptr
RO 0x0
9
8
7
6
curtbufaptr
RO 0x0
Description
Base Address
Bit Fields
25
24
23
22
currbufaptr
RO 0x0
9
8
7
6
currbufaptr
RO 0x0
21
20
19
18
5
4
3
2
Access
Register Address
0xFF701054
0xFF703054
21
20
19
18
5
4
3
2
17-867
17
16
1
0
Reset
RO
0x0
17
16
1
0
Altera Corporation

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