Altera cyclone V Technical Reference page 2106

Hard processor system
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18-16
IN Transactions
IN Transactions
For an IN transaction, the application performs the following steps:
1. Enables the endpoint
2. Triggers the DMA engine to write the associated data packet to the corresponding transmit FIFO
buffer
3. Waits for the packet completion interrupt from the controller
When an IN token is received on an endpoint when the associated transmit FIFO buffer does not contain
sufficient data, the controller performs the following steps:
1. Generates an interrupt
2. Returns a NAK handshake to the USB host
If sufficient data is available, the controller transmits the data to the USB host.
OUT Transactions
For an OUT transaction, the application performs the following steps:
1. Enables the endpoint
2. Waits for the packet received interrupt from the USB OTG controller
3. Retrieves the packet from the receive FIFO buffer
When an OUT token or PING token is received on an endpoint where the receive FIFO buffer does not
have sufficient space, the controller performs the following steps:
1. Generates an interrupt
2. Returns a NAK handshake to USB host
If sufficient space is available, the controller stores the data in the receive FIFO buffer and returns an ACK
handshake to the USB link.
Control Transfers
For control transfers, the application performs the following steps:
1. Waits for the packet received interrupt from the controller
2. Retrieves the packet from the receive buffer
Because the control transfer is governed by USB protocol, the controller always responds with an ACK
handshake.
Altera Corporation
cv_5v4
2016.10.28
USB 2.0 OTG Controller
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