Ram Emulation Register (Ramer) - Renesas H8S/2633 Series Hardware Manual

22.5.5

RAM Emulation Register (RAMER)

Bit:
Initial value:
R/W:
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER initialized to H'00 by a power-on reset and in
hardware standby mode. It is not initialized by a manual reset and in software standby mode.
RAMER settings should be made in user mode or user program mode.
Flash memory area divisions are shown in table 22-8. To ensure correct operation of the emulation
function, the ROM for which RAM emulation is performed should not be accessed immediately
after this register has been modified. Normal execution of an access immediately after register
modification is not guaranteed.
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3
RAMS Description
0 Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
1 Emulation selected
Program/erase-protection of all flash memory blocks is enabled
7 6 5
— — —
0 0 0
R R R/W
4 3 2
— RAMS RAM2
0 0 0
R/W R/W R/W
1 0
RAM1 RAM0
0 0
R/W R/W
(Initial value)
913