Sci Initialization (Asynchronous Mode) - Renesas RZ/A Series User Manual

RZ/A1L Group, RZ/A1LU Group, RZ/A1LC Group
15.3.5

SCI Initialization (Asynchronous Mode)

Before transmitting and receiving data, start by writing the initial value "00h" to SCR and then continue through the
procedure for SCI given in the sample flowchart (Figure 15.5). Whenever the operating mode or transfer format is
changed, SCR must be initialized before the change is made.
When the external clock is used in asynchronous mode, ensure that the clock signal is supplied even during initialization.
Note that clearing the SCR.RE bit to 0 initializes neither the ORER, FER, and PER flags in SSR nor RDR.
Moreover, note that switching the value of the SCR.TE bit from 1 to 0 or 0 to 1 while the SCR.TIE bit is 1 leads to the
generation of a TXI interrupt request.
Start initialization
Clear the SCR.TIE, RIE, TE, RE, and
TEIE bits to 0
Set the I/O port functions
Set bits CKE[1:0] in SCR
Set the data transmission/reception format in
SMR, SCMR, and SEMR
Set a value in BRR
Set the SCR.TE or RE bit to 1, and
set the SCR.TIE and RIE bits
<Initialization completion>
Figure 15.5 Sample SCI Initialization Flowchart (Asynchronous Mode)
R01UH0437EJ0600 Rev.6.00
Jan 29, 2021
[ 1 ] Make I/O port settings to enable input and output functions
as required for TXDn, RXDn, and SCKn pins.
[ 2 ] Set the clock selection in SCR.
When the clock output is selected in asynchronous mode,
the clock is output immediately after SCR settings are made.
[ 1 ]
[ 3 ] Set data transmission/reception format in SMR, SCMR, and
SEMR.
[ 2 ]
[ 4 ] Write a value corresponding to the bit rate to BRR.
This step is not necessary if an external clock is used.
[ 3 ]
[ 5 ] Set the SCR.TE or RE bit to 1. Also set the SCR.TIE and
RIE bits.
[ 4 ]
Setting the TE and RE bits allows TXDn and RXDn to be
used.
[ 5 ]
15. Serial Communications Interface
15-27