Table 14.3 Registers Accessible By Tmr_X/Tmr_Y - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Bit
Bit Name
3
VOMOD1
2
VOMOD0
1
CLMOD1
0
CLMOD0
Legend:
X: Don't care

Table 14.3 Registers Accessible by TMR_X/TMR_Y

TMRX/Y
H'FFF0
0
TMR_X
TCR_X
1
TMR_Y
TCR_Y
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
H'FFF1
H'FFF2
TMR_X
TMR_X
TCSR_X
TICRR
TMR_Y
TMR_Y
TCSR_Y
TCORA_Y
Description
Vertical Synchronization Output Mode Select 1, 0
These bits select the signal source and generation
method for the IVO signal.
ISGENE = 0
00: The IVI signal (without fall modification or IHI
synchronization) is selected
01: The IVI signal (without fall modification, with
IHI synchronization) is selected
10: The IVI signal (with fall modification, without
IHI synchronization) is selected
11: The IVI signal (with fall modification and IHI
synchronization) is selected
ISGENE = 1
XX: The IVG signal is selected
Clamp Waveform Mode Select 1, 0
These bits select the signal source for the CLO signal
(clamp waveform).
ISGENE = 0
00: The CL1 signal is selected
01: The CL2 signal is selected
1X: The CL3 signal is selected
ISGENE = 1
XX: The CL4 signal is selected
H'FFF3
H'FFF4
TMR_X
TMR_X
TICRF
TCNT
TMR_Y
TMR_Y
TCORB_Y
TCNT_Y
Rev. 3.00 Jan 25, 2006 page 355 of 872
Section 14 Timer Connection
H'FFF5
H'FFF6
TMR_X
TMR_X
TCORC
TCORA_X
TMR_Y
TISR
REJ09B0286-0300
H'FFF7
TMR_X
TCORB_X

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