Figure 8.1 Port Block Diagram - Renesas H8SX/1520 Series Hardware Manual

Figure 8.1 is a port block diagram.
Input buffer
[Legend]
WDDR: DDR write
WDR: DR write
WICR: ICR write
WPCR: PCR write
WODR: ODR write
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1
0
RPOR
RDR: DR read
RPOR: PORT read
RICR: ICR read
RPCR: PCR read
RODR: ODR read

Figure 8.1 Port Block Diagram

R
Q PCR S
CK
WPCR
RPCR
R
Q DDR S
CK
WDDR
R
Q DR S
CK
WDR
R
Q ODR S
CK
WODR
RODR
RDR
RPOR
1
0
R
Q ICR S
CK
WICR
RICR
Rev. 3.00 Mar. 14, 2006 Page 211 of 804
Section 8 I/O Ports
Address output
Data output
On-chip peripheral
module output
On-chip peripheral
module output enable
On-chip peripheral
module output signal
To on-chip
Peripheral module
REJ09B0104-0300