C.1
Port 1 Block Diagram
P1
n
Legend:
WDDR1:
WDR1:
RDR1:
RPOR1:
n = 0 or 1
Rev.6.00 Oct.28.2004 page 968 of 1016
REJ09B0138-0600H
Appendix C I/O Port Block Diagrams
Write to P1DDR
Write to P1DR
Read P1DR
Read port 1
Figure C-1 (a) Port 1 Block Diagram (Pins P1
Reset
R
Q
D
P1nDDR
C
WDDR1
Reset
R
Q
D
P1nDR
C
WDR1
PPG module
Pulse output enable
Pulse output
DMA controller
DMA transfer
acknowledge enable
DMA transfer
acknowledge
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RDR1
RPOR1
Input capture input
and P1
)
0
1