Multiprocessor Communication Function - Renesas Hitachi H8S/2194 Series Hardware Manual

Figure 23.8 shows an example of the operation for reception in asynchronous mode.
Start
bit
1
0 D0
RDRF
FER
Figure 23.8 Example of SCI1 Operation in Reception
23.3.3

Multiprocessor Communication Function

The multiprocessor communication function performs serial communication using a
multiprocessor format, in which a multiprocessor bit is added to the transfer data, in
asynchronous mode. Use of this function enables data transfer to be performed among a number
of processors sharing transmission lines.
When multiprocessor communication is carried out, each receiving station is addressed by a
unique ID code.
The serial communication cycle consists of two component cycles: an ID transmission cycle
which specifies the receiving station, and a data transmission cycle. The multiprocessor bit is
used to differentiate between the ID transmission cycle and the data transmission cycle.
The transmitting station first sends the ID of the receiving station with which it wants to perform
serial communication as data with a 1 multiprocessor bit added. It then sends transmit data as
data with a 0 multiprocessor bit added.
The receiving station skips the data until data with a 1 multiprocessor bit is sent.
When data with a 1 multiprocessor bit is received, the receiving station compares that data with
its own ID. The station whose ID matches then receives the data sent next. Stations whose ID
does not match continue to skip the data until data with a 1 multiprocessor bit is again received.
In this way, data communication is carried out among a number of processors.
Figure 23.9 shows an example of inter-processor communication using a multiprocessor format.
Rev. 2.0, 11/00, page 478 of 1037
Data
Parity Stop
bit bit
D1 D7 0/1
RXI interrupt
request
generation
1 frame
(Example with 8-Bit Data, Parity, One Stop Bit)
Data
Start
bit
1 0 D0 D1
RDR1 data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
Parity Stop
bit bit
1
Idle state
D7 0/1 0
(mark state)
ERI interrupt request
generated by framing
error