A/D Converter Operation Modes; Software Trigger Mode (Select Mode, Sequential Conversion Mode) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

9.6 A/D Converter Operation Modes

The operation of each A/D converter mode is described below. In addition, the procedure for specifying each mode is
described in 9.7 A/D Converter Setup Flowchart.

9.6.1 Software trigger mode (select mode, sequential conversion mode)

<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time
perform the A/D conversion of the analog input specified by the analog input channel specification register (ADS).
<3> When A/D conversion ends, the conversion result is stored in the A/D conversion result register (ADCR, ADCRH),
and the A/D conversion end interrupt request signal (INTAD) is generated. After A/D conversion ends, the next
A/D conversion immediately starts.
<4> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<5> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the analog input respecified by the ADS register.
The partially converted data is discarded.
<6> Even if a hardware trigger is input during conversion operation, A/D conversion does not start.
<7> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the
system enters the A/D conversion standby status.
<8> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCE = 0, specifying 1 for ADCS is ignored and A/D conversion does not start.
Note If a high-accuracy channel is selected as the analog input channel: Stabilization wait time = 0.5
If a standard channel is selected as the analog input channel:
Figure 9-17. Example of Software Trigger Mode (Select Mode, Sequential Conversion Mode) Operation Timing
<1> ADCE is set to 1.
ADCE
<2> ADCS is set to 1 while in the
conversion standby status.
The trigger
is not
acknowledged.
ADCS
ADS
A/D
Stop Data 1
conversion
Conversion
status standby (ANI0)
status
ADCR,
ADCRH
INTAD
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<4> ADCS is overwritten
with 1 during A/D
conversion operation.
ANI0
Conversion is
<3> A/D conversion
<3>
ends and the next interrupted
conversion starts.
and restarts.
Data 3
Data 2 Data 4
(ANI0)
(ANI0) (ANI0)
Data 1 Data 2
(ANI0) (ANI0)
CHAPTER 9 A/D CONVERTER
, the ADCS bit of the ADM0 register is set to 1 to
Note
Stabilization wait time = 2
<6> A hardware trigger is
generated
(and ignored).
ADS is rewritten during
<5>
A/D conversion operation
(from ANI0 to ANI1).
ANI1
<3>
<3>
Data 6
Data 5 Data 7
(ANI1)
(ANI0) (ANI1)
Data 4 Data 6
(ANI0) (ANI1)

s

s
ADCE is cleared to 0. <8>
ADCS is cleared to
<7>
0 during A/D
The trigger
conversion operation.
is not
acknowledged.
<3>
Conversion is
interrupted.
Data 8 Conversion
(ANI1) standby
status
Data 7
(ANI1)
Stop
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