Pin Configuration; Register Configuration - Renesas H8 Series Hardware Manual

Section 6 ROM
6.4.5

Pin Configuration

The flash memory is controlled by means of the pins shown in table 6.6.
Table 6.6 Flash Memory Pins
Pin Name
Programming power
Mode pin
Transmit data
Receive data
The transmit data pin and receive data pin are used in boot mode.
6.4.6

Register Configuration

The registers used to control the on-chip flash memory are shown in table 6.7.
Table 6.7 Flash Memory Registers
Register Name
Flash memory control register
Erase block register 1
Erase block register 2
The FLMCR, EBR1, and EBR2 registers are valid only when programming and erasing flash
memory, and can only be accessed when 12 V is applied to the FV
applied to the FV pin, addresses H'FF80 to H'FF83 cannot be modified and are always read as
PP
H'FF.
Rev. 6.00 Sep 12, 2006 page 114 of 526
REJ09B0326-0600
Abbreviation Input/Output
FV Power supply
PP
TEST Input
TXD Output
RXD Input
Abbreviation
FLMCR
EBR1
EBR2
Function
Apply 12.0 V
Sets H8/3644F operating mode
SCI3 transmit data output
SCI3 receive data input
R/W Initial Value
R/W H'00
R/W H'F0
R/W H'00
pin. When 12 V is not
PP
Address
H'FF80
H'FF82
H'FF83