Module Stop Control Register (Mstpcr) - Renesas Hitachi H8S/2194 Series Hardware Manual

Bit 1: Reserved
This bit cannot be modified and is always read as 1.
Bit 0: Serial Communication Interface Mode Select (SMIF)
1 should not be written in this bit.
Bit 0
SMIF Description
0 Normal SCI mode
1 Reserved mode

23.2.10 Module Stop Control Register (MSTPCR)

Bit :
7 6
MSTP15 MSTP14 MSTP13 MSTP12 MSTP11 MSTP10 MSTP9 MSTP8
Initial value :
1 1
R/W :
R/W R/W
MSTPCR, comprising two 8-bit readable/writable registers, performs module stop mode control.
When bit MSTP8 is set to 1, SCI1 operation stops at the end of the bus cycle and a transition is
made to module stop mode. For details, see section 4.5, Module Stop Mode.
MSTPCR is initialized to H'FFFF by a reset.
Bit 0: Module Stop (MSTP8)
Specifies the SCI1 module stop mode.
MSTPCRH
Bit 0
MSTP8 Description
0 SCI1 module stop mode is cleared
1 SCI1 module stop mode is set
MSTPCRH
5 4 3 2
1 1 1 1
R/W R/W R/W R/W
1 0 7 6
MSTP7 MSTP6 MSTP5
1 1 1 1
R/W R/W R/W R/W
Rev. 2.0, 11/00, page 465 of 1037
(Initial value)
MSTPCRL
5 4 3 2
MSTP4 MSTP3 MSTP2 MSTP1
1 1 1 1
R/W R/W R/W R/W
(Initial value)
1 0
MSTP0
1 1
R/W R/W