8-Bit Pwm; 8-Bit Input Capture Using Ic Pin; Frequency Division Clock Output - Renesas Hitachi H8S/2194 Series Hardware Manual

22.4.4

8-Bit PWM

This 8-bit PWM controls the duty control PWM signal in the conversion cycle 256 states. It
counts the cycle and the duty cycle at 2
motors and loading motors. For details, see section 19, 8-Bit PWM.
22.4.5 8-Bit Input Capture Using
This function catches the 8-bit data of 2
can be used for remote control receiving.
,&
For the edge of the
,&
The pin has a built-in noise cancel circuit. See section 22.3, Noise Cancel Circuit.
An interrupt request is generated due to the input capture using the
Note: Rewriting the ICEG bit, NCon/off bit, or PMR16 bit is incorrectly recognized as edge
detection according to the combinations between the state and detection edge of the
pin and the ICIF bit may be set after up to 384φ seconds.
22.4.6

Frequency Division Clock Output

The frequency division clock can be output from the TMOW pin. For the frequency division
clock, eight types of clocks can be selected according to the DCS2 to DCS0 bits in PCSR.
The clock in which the system clock was frequency-divided is output in active mode and sleep
mode and the clock in which the subclock was frequency-divided is output in active mode*,
sleep mode*, and subactive mode.
Note: * When the timer A is in module stop mode, no clock is output.
Rev. 2.0, 11/00, page 440 of 1037
7
to 2
,& ,&
Pin
15
to 2
pin, the rising and falling edges can be selected.
0
of the FRC. It can be used for controlling reel
8
of the FRC according to the edge of the
,&
,&
pin.
pin. It
,&