Serial Mode Register (Smr1) - Renesas Hitachi H8S/2194 Series Hardware Manual

23.2.5

Serial Mode Register (SMR1)

7
Bit :
C/A
0
Initial value :
R/W
R/W :
SMR1 is an 8-bit register used to set the SCI1's serial transfer format and select the baud rate
generator clock source.
SMR1 can be read or written to by the CPU at all times.
SMR1 is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode.
Bit 7: Communication Mode (C/
Selects asynchronous mode or clock synchronous mode as the SCI1 operating mode.
Bit 7
 
C/ Description
0 Asynchronous mode
1 Clock synchronous mode
Bit 6: Character Length (CHR)
Selects 7 or 8 bits as the data length in asynchronous mode. In synchronous mode, a fixed data
length of 8 bits is used regardless of the CHR setting.
Bit 6
CHR Description
0 8-bit data
1 7-bit data*
Note: When 7-bit data is selected, the MSB (bit 7) of TDR1 is not transmitted, and LSB-
*
first/MSB-first selection is not available.
6 5
CHR PE O/E
0 0
R/W R/W R/W
 
)
4 3 2
STOP MP
0 0 0
R/W R/W
Rev. 2.0, 11/00, page 447 of 1037
1 0
CKS1 CKS0
0 0
R/W R/W
(Initial value)
(Initial value)