Renesas Hitachi H8S/2194 Series Hardware Manual page 914

Table A.4 Number of States Required for Each Execution Status (Cycle)
Execution Status (Cycle)
Instruction fetch S
I
Branch address read S
Stack operation S
K
Byte data access S
L
Word data access S
M
Internal operation S
N
Target of Access
On-Chip Memory
1
J
1
On-Chip Supporting Module
8-bit bus
—
2
4
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16-bit bus
—
2