Renesas Hitachi H8S/2194 Series Hardware Manual page 791

The X-value is updated by REF30P. Modification of XDR must be performed
before REF30P in the cycle in which the X-value is changed.
VD
REF30P
HSW
REF30X
PB-CTL
CTL
16bit
UP/DOWN
counter
DVCFG2
Figure 28.50 Example of CTLM Switchover Timing
(When Phase Control is Performed by REF30P and DVCFG2 in REC Mode)
Rev. 2.0, 11/00, page 764 of 1037
X-value (XDR) is
rewritten in this
cycle
X-value
Ta
/5
/4
0 pulse 1 pulse
X-value
after
change
Capstan phase control
Tx
ASM mode, PB mode : REF30X-PB-CTL
REC mode
REC-CTL
Tb
/4
RCDR1 RCDR3
UDF
0 pulse
CDIVR2
Register write
Ta is the interval calculated from RDCR3.
Tb is the interval in which switchover is performed
from ASM mode to REC mode.
Tx is the cycle in which the REF30X period is
shortened due to the change of XDR.
Latch
Preset
: REF30P-DVCFG2
RCDR1 RCDR2
1 pulse