Bsr Instruction - Renesas Hitachi H8S/2194 Series Hardware Manual

27.3.4

BSR Instruction

(1) BSR Instruction (8-bit displacement)
When the trap address is the next instruction to the BSR instruction and the addressing mode
is an 8-bit displacement, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02C2.
BSR
instruc-
tion
pre-fetch
Address bus
0294
Interrupt
request
signal
NOP MOV
Stack
instruc- instruc-
tion tion
saving
pre-fetch pre-fetch
0296 02C2 SP-2 SP-4
BSR execution
Figure 27.10 BSR Instruction (8-bit Displacement)
Start of
exception handling
0294
*
0296
0298
02C4
02C2
02C4
Rev. 2.0, 11/00, page 601 of 1037
(@ER0 = H'02C2)
BSR @ER0
NOP
NOP
: :
MOV.W R4, @OUT
NOP
* Trap setting address
The underlines address is the
one to be actually stacked.