Renesas Hitachi H8S/2194 Series Hardware Manual page 512

16-bit single-chip microcomputer
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Start
bit
1
0
D0
MPIE
RDRF
RDR1
value
MPIE=0
Start
bit
1
0
D0
MPIE
RDRF
RDR1
ID1
value
MPIE=0
Figure 23.13 Example of SCI Operation in Reception
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
Data (ID1)
Stop
MPB
bit
D1
D7
1
RXI interrupt
RDR1 data read
request (multi-
and RDRF flag
processor
cleared to 0 in
interrupt)
RXI interrupt
generated
handling routine
(a) Data does not match station's ID
Data (ID2)
Stop
bit
MPB
D1
D7
1
RXI interrupt
RDR1 data read and
request (multi-
RDRF flag cleared
processor
to 0 in RXI interrupt
interrupt)
handling routine
generated
(b) Data matches station's ID
Data (Data 1)
Start
bit
1
0
D0
D1
If not this station's
ID, MPIE bit is set
to 1 again
Data (Data 2)
Start
bit
1
0
D0
D1
Matches this station's
ID, so reception continues,
and data is received in RXI
interrupt handling routine
Rev. 2.0, 11/00, page 485 of 1037
Stop
MPB
bit
1
D7
0
1
Idle state
(mark state)
ID1
RXI interrupt request
is not generated, and
RDR1 retains its state
Stop
bit
MPB
D7
0
1
Idle state
(mark state)
ID2
Data2
MPIE bit set
to 1 again
1

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