Renesas Hitachi H8S/2194 Series Hardware Manual page 73

16-bit single-chip microcomputer
Table of Contents

Advertisement

(4) Register Indirect with Post-Increment or Pre-Decrement–@ERn+ or @-ERn
(a) Register indirect with post-increment–@ERn+
The register field of the instruction code specifies an address register (ERn) which
contains the address of a memory operand. After the operand is accessed, 1, 2, or 4 is
added to the address register contents and the sum is stored in the address register. The
value added is 1 for byte access, 2 for word access, or 4 for longword access. For word
or longword access, the register value should be even.
(b) Register indirect with pre-decrement–@-ERn
The value 1, 2, or 4 is subtracted from an address register (ERn) specified by the register
field in the instruction code, and the result becomes the address of a memory operand.
The result is also stored in the address register. The value subtracted is 1 for byte access,
2 for word access, or 4 for longword access. For word or longword access, the register
value should be even.
(5) Absolute Address–@aa:8, @aa:16, @aa:24, or @aa:32
The instruction code contains the absolute address of a memory operand. The absolute
address may be 8 bits long (@aa:8), 16 bits long (@aa:16), 24 bits long (@aa:24), or 32 bits
long (@aa:32).
To access data, the absolute address should be 8 bits (@aa:8), 16 bits (@aa:16), or 32 bits
(@aa:32) long. For an 8-bit absolute address, the upper 24 bits are all assumed to be 1
(H'FFFF). For a 16-bit absolute address the upper 16 bits are a sign extension. A 32-bit
absolute address can access the entire address space.
A 24-bit absolute address (@aa:24) indicates the address of a program instruction. The
upper 8 bits are all assumed to be 0 (H'00).
Table 2.12 indicates the accessible absolute address ranges.
Table 2.12 Absolute Address Access Ranges
Absolute Address
Data address
Program instruction
address
Rev. 2.0, 11/00, page 46 of 1037
Normal Mode
8 bits
H'FF00 to H'FFFF
(@aa:8)
16 bits
H'0000 to H'FFFF
(@aa:16)
32 bits
(@aa:32)
24 bits
(@aa:24)
Advanced Mode
H'FFFF00 to H'FFFFFF
H'000000 to H007FFF, H'FF8000 to
H'FFFFFF
H'000000 to H'FFFFFF

Advertisement

Table of Contents
loading

Table of Contents