Timing Of Setting Of Overflow Flag (Ovf) - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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18.3.3

Timing of Setting of Overflow Flag (OVF)

The OVF bit in WTCSR is set to 1 if WTCNT overflows during interval timer operation. At the
same time, an interval timer interrupt (WOVI) is requested. This timing is shown in figure 18.5.
If NMI request generation is selected in watchdog timer mode, when WTCNT overflows the
OVF bit in WTCSR is set to 1 and at the same time an NMI interrupt is requested.
CK
WTCNT
Overflow signal
(internal signal)
OVF
H'FF
Figure 18.5 Timing of OVF Setting
H'00
Rev. 2.0, 11/00, page 401 of 1037

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