Drum Phase Error Detector; Overview; Block Diagram - Renesas Hitachi H8S/2194 Series Hardware Manual

28.7

Drum Phase Error Detector

28.7.1

Overview

Drum phase control must start operating after the drum motor is brought to the correct revolution
speed by the speed control system. Drum phase control works as follows in record and
playback.
Record: Phase is controlled so that the vertical blanking intervals of the recorded video signal
will line up along the bottom edge of the tape.
Playback: Phase is controlled so as to trace the recorded tracks accurately.
A digital counter detects the phase deviation from a preset value. The phase error data is
processed and added to speed error data in a digital filter. This filter controls a pulse-width
modulated (PWM) output, which controls the rotational phase and speed of the drum.
The DPG signal from the drum motor is reshaped into a rectangular pulse waveform by a
reshaping circuit, and sent to the phase error detector.
The phase error detector compares the phase of the DPG pulse (tackle pulse), which contains
video head phase information, with a reference signal. In the actual circuit, the comparison is
carried out by comparing the head-switching (HSW) signal, which is delayed by a counter that is
reset by DPG, with a reference signal value. The reference signal is the REF30 signal, which
differs between record and playback as follows.
Record: Vsync signal extracted from the video signal to be recorded (frame rate signal, actually
1/2 Vsync)
Playback: 30 Hz or 25 Hz signal divided from the system clock
28.7.2

Block Diagram

Figure 28.29 shows a block diagram of the drum phase error detector.
Rev. 2.0, 11/00, page 692 of 1037