Error Protection - Renesas Hitachi H8S/2194 Series Hardware Manual

7.6.3

Error Protection

In error protection, an error is detected when MCU runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the program/erase
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
If the MCU malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in
FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1, and EBR2
settings are retained, but program mode or erase mode is aborted at the point at which the error
occurred. Program mode or erase mode cannot be re-entered by re-setting the P or E bit.
However, PV and EV bit setting is enabled, and a transition can be made to verify mode.
FLER bit setting conditions are as follows:
(1) When flash memory is read during programming/erasing (including a vector read or
instruction fetch)
(2) Immediately after exception handling (excluding a reset) during programming/erasing
(3) When a SLEEP instruction is executed during programming/erasing
Error protection is released only by a reset and in hardware standby mode.
Figure 7.14 shows the flash memory state transition diagram.
Program mode
Erase mode
RD VF PR ER FLER = 0
Error occurrence
Error protection mode
RD VF PR ER FLER = 1
*1: Watch mode, standby mode, and
subactive mode
RD
VF
PR
ER
Rev. 2.0, 11/00, page 152 of 1037
RES = 0
Power-down state
Power-down state
release
: Memory read possible
: Verify-read possible
: Programming possible
: Erasing possible
Figure 7.14 Flash Memory State Transitions
Reset
(hardware protection)
RD VF PR ER FLER = 0
RES = 0
Error protection mode
(Power-down state)
*1
RD VF PR ER FLER = 1
*1
FLMCR1, FLMCR2 (except FLER bit), EBR1, EBR2
initialization state
RD : Memory read not possible
VF : Verify-read not possible
PR : Programming not possible
ER : Erasing not possible
FLMCR1, FLMCR2,
EBR1, EBR2 initialization
state
*1