Renesas Hitachi H8S/2194 Series Hardware Manual page 396

16-bit single-chip microcomputer
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Bit 2: Output Comparing Flag B (OCFB)
This is a status flag indicating the fact that the FRC and the OCRB have come to a comparing
match.
This flag should be cleared by use of the software. Such setting should only be made by use of
the hardware. It is not possible to make this setting using a software.
Bit 2
OCFB
Description
0
[Clearing conditions]
When 0 is written into the OCFB after reading the OCFB under the setting of OCFB
= 1
1
[Setting conditions]
When the FRC and the OCRB have come to the comparing match
Bit 1: Time Over Flow (OVF)
This is a status flag indicating the fact that the FRC overflowed. (H'FFFF → H'0000).
This flag should be cleared by use of the software. Such setting should only be made by use of
the hardware. It is not possible to make this setting using a software.
Bit 1
OVF
Description
0
[Clearing conditions]
When 0 is written into the OVF after reading the OVF under the setting of OVF = 1
1
[Setting conditions]
When the FRC value has become H'FFFF → H'0000
Bit 0: Counter Clearing (CCLRA)
This bit works to select if or not to clear the FRC by occurrence of comparing match A
(matching signal of the FRC and OCRA).
Bit 0
CCLRA
Description
0
Prohibits clearing of the FRC by occurrence of comparing match A
1
Permits clearing of the FRC by occurrence of comparing match A
(Initial value)
(Initial value)
(Initial value)
Rev. 2.0, 11/00, page 369 of 1037

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