Output Comparing Signal Outputting Timing; Frc Clearing Timing - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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17.3.3

Output Comparing Signal Outputting Timing

When a comparing match occurs, the output level having been set by the OLVL of the TOCR is
output through the output comparing signal outputting pins (FTOA and FTOB).
Figure 17.5 shows the timing chart in case of the output comparing signal outputting A.
FRC
OCRA
Comparing match
signal
OLVLA
FTOA
Output comparing
signal outputting
A pin
Note: 1. Execution of the command is to be designated by the software.
Figure 17.5 Output Comparing Signal Outputting A Timing
17.3.4

FRC Clearing Timing

The FRC can be cleared when the comparing match A occurs. Figure 17.6 shows the timing
chart when doing so.
Comparing match
A signal
FRC
Figure17.6 FRC Clearing Timing by Occurrence of the Comparing Match A
Rev. 2.0, 11/00, page 378 of 1037
N
N+1
N
N
N
N
*1
Clearing
H' 0000
N+1

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