Renesas Hitachi H8S/2194 Series Hardware Manual page 48

16-bit single-chip microcomputer
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(d) Exception Vector Table and Memory Indirect Branch Addresses
In advanced mode the top area starting at H'00000000 is allocated to the exception vector
table in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch address
is stored in the lower 24 bits (figure 2.4). For details of the exception vector table, see
section 5, Exception Handling.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010
Figure 2.4 Exception Vector Table (Advanced Mode)
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR
instructions uses an 8-bit absolute address included in the instruction code to specify a
memory operand that contains a branch address. In advanced mode the operand is a 32-
bit longword operand, providing a 32-bit branch address. The upper 8 bits of these 32
bits are a reserved area that is regarded as H'00. Branch addresses can be stored in the
area from H'00000000 to H'000000FF. Note that the first part of this range is also the
exception vector table.
Reserved
Reset exception vector
Reserved
(Reserved for system use)
Reserved
Exception vector 1
Exception vector table
Rev. 2.0, 11/00, page 21 of 1037

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