Register Configuration - Renesas Hitachi H8S/2194 Series Hardware Manual

18.1.3

Register Configuration

The WDT has two registers, as summarized in table 18.2. These registers control clock
selection, WDT mode switching, the reset signal, etc.
Table 18.2 WDT Registers
Name
Watchdog timer
control/status register
Watchdog timer counter
System control register
Notes: 1. Lower 16 bits of the address.
2. For details of write operations, see section 18.2.4, Notes on Register Access.
3. Only 0 can be written in bit 7, to clear the flag.
Abbrev. R/W
*3
WTCSR R/ (W)
WTCNT R/W
SYSCR R/W
Address
Initial Value Write
H'00 H'FFBC
H'00 H'FFBC
H'09 H'FFE8
Rev. 2.0, 11/00, page 393 of 1037
*1
*2
Read
H'FFBC
H'FFBD
H'FFE8