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Table 23.4 BRR1 Settings for Various Bit Rates (Clock Synchronous Mode)
Operating Frequency φ (MHz)
Bit
2
Rate
(bits/s)
n
110
3
250
2
500
1
1 k
1
2.5 k
0
5 k
0
10 k
0
25 k
0
50 k
0
100 k
0
250 k
0
500 k
0
1 M
2.5 M
5 M
Note: As far as possible, the setting should be made so that the error is no more than 1%.
Legend:
Blank: Cannot be set.
—:
Can be set, but there will be a degree of error.
Continuous transfer is not possible.
*:
Rev. 2.0, 11/00, page 460 of 1037
4
N
n
70
124
2
249
2
124
1
199
1
99
0
49
0
19
0
9
0
4
0
1
0
0*
0
0
8
N
n
249
3
124
1
249
2
99
1
199
1
99
0
39
0
19
0
9
0
3
0
1
0
0*
0
10
N
n
124
249
124
199
1
99
1
199
0
79
0
39
0
19
0
7
0
3
0
1
0
N
249
124
249
99
49
24
9
4
0*
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