Renesas Hitachi H8S/2194 Series Hardware Manual page 985

H'D100: Timer Interrupt Enable Register ITER: Timer X1
Bit : 7
ICIAE
Initial value :
0
R/W :
R/W
Input capture A interrupt enable bit
0
1
Rev. 2.0, 11/00, page 958 of 1037
6 5 4
ICIBE ICICE ICIDE
0 0 0
R/W R/W R/W
Input capture D interrupt enable bit
0
1
Input capture C interrupt enable bit
0 ICFC interrupt request (ICIC) is disabled
1 ICFC interrupt request (ICIC) is enabled
Input capture B interrupt enable bit
0 ICFB interrupt request (ICIB) is disabled
1 ICFB interrupt request (ICIB) is enabled
ICFA interrupt request (ICIA) is disabled
ICFA interrupt request (ICIA) is enabled
3 2 1
OCIAE OCIBE OVIE
0 0 0
R/W R/W R/W
Output compare interrupt enable bit
Output compare interrupt B enable bit
0 OCFB interrupt request (OCIB) is disabled
1 OCFB interrupt request (OCIB) is enabled
Output compare interrupt A enable bit
0 OCFA interrupt request (OCIA) is disabled
1 OCFA interrupt request (OCIA) is enabled
ICFD interrupt request (ICID) is disabled
ICFD interrupt request (ICID) is enabled
0
ICSA
0
R/W
Input capture input select A bit
0 FTIA pin input is selected
for input capture A input
1 HSW is selected for input
capture A input
0 OCFC interrupt request
(OCIC) is disabled
1 OCFC interrupt request
(OCIC) is enabled